1. Design of cost-efficient interconnect processing unit
Author: / Marcello Coppola ... [et al.
Library: Central Library, Center of Documentation and Supply of Scientific Resources (East Azarbaijan)
Subject: ST Microelectronics.,Networks on a chip.,Microprocessors.
2. Design of cost-efficient interconnect processing units: Spidergon STNoC
Author: / Marcello Coppola ... [et al.]
Library: Central Library and Archive Center of shahid Beheshti University (Tehran)
Subject: Networks on a chip,ST Microelectronics,Microprocessors
Classification :
004
.
1
D457
2009
3. Design of cost-efficient interconnect processing units : Spidergon STNoC
Author: Marcello Coppola ... ]et al.[
Library: Library of Institute for Research in Fundamental Sciences (Tehran)
Subject: ، Networks on a chip,، ST Microelectronics,، Microprocessors
Classification :
TK
5105
.
546
.
D466
